The present invention relates to a boundary scan element used for a boundary scan testing method and a communication apparatus which applies the boundary scan element as a communication element thereto, more particularly to a boundary scan element for enabling high speed processing and a communication apparatus using the boundary scan element.
Concerning a method for checking whether or not printed-wiring is correctly connected to corresponding IC chips and whether or not the printed-wiring is disconnected in a state where the IC chips are arranged on a wiring board on which the printed wiring is formed, a boundary scan testing method has been proposed.
The boundary scan testing method can be implemented for semiconductor integrated circuits (IC chips) in which the boundary scan elements are integrated. As shown in FIG. 3, the boundary scan element is composed, for example, of a plurality of boundary cells 214, each of which is individually provided between an input/output terminal of an internal logic circuit 211 for allowing an integrated circuit 210 to achieve its inherent function and an input terminal 212 of the integrated circuit 210 as well as between the input/output terminal of the internal logic circuit 211 and an output terminal 213 of the integrated circuit 210; a TAP controller (TAP circuit) 219 for controlling input/output of data to/from each boundary cell 214; a TDI terminal 220 for receiving test data; a TDO terminal 221 for transmitting the test data; a TCK terminal 222 to which a clock signal is inputted; and a TMS terminal 223 for receiving a mode signal to switch an operation mode of the TAP controller 219. Further, the boundary scan element may optionally be provided with any of a bypass register 215; an ID CODE register 216; an instruction register 217; and a TRS terminal 224 for receiving a reset signal. The bypass register 215 serves to transfer communication data without allowing the communication data to pass through the boundary cells, and the ID CODE register 216 serves to discriminate sources of the communication data by outputting individually assigned ID CODES. The instruction register 217 serves to decode specified data selected among the communication data so as to perform a transition of the operation mode independently of a TMS signal. It should be noted that the bypass register 215, the ID CODE register 216 and the instruction register 217 are called a boundary scan register (118).
Descriptions for terminals and signals inputted/outputted to/from the terminals will be made as follows. A TDI (Test Data In) is a signal for allowing instructions and data to be serially inputted to a test logic, and sampled at a rising edge of the TCK. A TDO (Test Data Out) is a signal for allowing the data from the test logic to be serially outputted, and changes an output value of the data at a falling edge of the TCK. The TCK (Test Clock) supplies clocks to the test logic. The TCK is an input terminal for permitting a serial test data path to be exclusively used independently of a system clock inherent to the component. A TMS (Test Mode Select) is a signal for controlling a test operation, and sampled at the rising edge of the TCK. This signal is decoded by a TAP controller. A TRST (Test Reset) is a negative logic symbol for initializing the TAP controller asynchronously, and is optionally used.
The integrated circuit 210 in which such boundary scan element is integrated can be tested for its operation state and its connection with any external equipment according to the procedures described below.
First, when it is checked whether an internal logic 211 of the integrated circuit 210 is good or bad, serial data (test data) is shifted while the test data is supplied to a TDI terminal 220 of the integrated circuit 210, and the test data is set in each boundary cell 214 provided for corresponding one of input terminals 212. In this situation, the integrated circuit 210 is operated, and thereafter the data is allowed to be shifted, which has already been set in each boundary cell 214 provided for corresponding one of output terminals 213. The shifted data is permitted to be outputted from a TDO terminal 221, whereby it is checked whether the internal logic 211 of the integrated circuit 210 is good or bad, based on a correlation between serial data obtained (test result data) and the test data inputted to the integrated circuit 210.
Furthermore, the boundary scan testing method can be executed also for a plurality of integrated circuits as long as the boundary scan element is incorporated in each of the integrated circuits.
For example, as for the plurality of integrated circuits 210 loaded on a board 226 as shown in FIG. 4, disconnections of printed patterns between the integrated circuits 210 can be checked, in addition to a test of the integrated circuit 210 itself.
In this case, the boundary scan elements incorporated in the plurality of integrated circuits 210 are connected in series. Specifically, the TDO terminal 221 of the first integrated circuit 210 shown in the left in FIG. 4 and the TDI terminal 220 of the second integrated circuit 210 shown in the right in FIG. 4 are connected. Moreover, an output terminal 229 of a boundary scan controller board 228 provided in a host computer unit 227 is connected to the TDI terminal 220 of the first integrated circuit 210, and an input terminal 230 of the boundary scan controller board 228 is connected to the TDO terminal 221 of the second integrated circuit 210. The test procedures are as follows.
In the case where the disconnection and short circuit of the printed pattern are tested, the test data (serial data) is created using a test data creation tool 231 and the like, and the test data (serial data) is outputted from the output terminal 229 of the boundary scan controller board 228. The test data (serial data) is shifted while the test data is being inputted to the TDI terminal 220 of the first integrated circuit 210, thereby setting the test data in each boundary cell 214 provided for corresponding one of the output terminals 213 of the first integrated circuit 210. In this situation, data stored in each boundary cell 214 is outputted from corresponding one of the output terminals 213 provided in the first integrated circuit 210 as shown in FIG. 5, and the data from each output terminal 213 is inputted, via each printed pattern 233 constituting a system bus and the like, to corresponding one of the input terminals 212 of the second integrated circuit 210. Moreover, the data is taken into each boundary cell 214 provided for corresponding one of the input terminals 212.
Thereafter, the data stored in each boundary cell 214 of the first and second integrated circuits 210 is shifted, and the data is analyzed with a test result analysis tool 232 and the like while the data is taken into an input terminal 230 of the boundary scan controller board 228. Thus, the check for the disconnection and short circuit of the printed pattern can be performed within a test range 235 of the printed pattern 233 connecting between the integrated circuits 210.
Next, in the case where the internal logic 211 of each integrated circuit 210 is examined, the test data is shifted while the test data is being outputted from an output terminal 229 of the boundary scan controller board 228 to the TDI terminal 220 of the first integrated circuit 210. As shown in FIG. 7, the test data is set in each boundary cell 214 provided for corresponding one of the input terminals 212 of the first integrated circuit 210.
Subsequently, the first integrated circuit 210 is operated, and the data obtained by the operation of the first integrated circuit 210 is taken into each boundary cell 214 provided for corresponding one of the output terminals 213. Thereafter, the data stored in each boundary cell 214 is shifted, and outputted from the TDO terminal 221 of the first integrated circuit 210. At this time, the second integrated circuit 210 is allowed to be bypassed by the boundary scan controller board 228 as shown in FIG. 6, whereby the data outputted from the TDO terminal 221 is taken into the input terminal 230 of the boundary scan controller board 228, bypassing the second integrated circuit 210. Then, by analyzing the data taken into the input terminal 230 using the test analysis tool 232 and the like, it can be checked whether or not the first integrated circuit 210 operates correctly.
Next, in the case where the second integrated circuit 210 is checked, the first integrated circuit 210 is similarly permitted to be bypassed by the boundary scan controller board 228 as shown in FIG. 6, and then the test data is outputted from the output terminal 229 of the boundary scan controller board 228, and the first integrated circuit 210 is bypassed. Then, the test data is shifted while the test data is being inputted to the TDI terminal 220 of the second integrated circuit 210, and the test data is set in each boundary cell 214 provided for corresponding one of the input terminals 212 of the second integrated circuit 210 as shown in FIG. 7. Subsequently, this integrated circuit 210 is operated, and the data obtained by the operation of this integrated circuit is taken into each boundary cell 214 provided for corresponding one of the output terminals 213. Thereafter, the data stored in each boundary cell 214 is shifted to be outputted from the TDO terminal 221, and moreover, the data is taken into by the input terminal 230 of the boundary scan controller board 228. Then, the data taken in is analyzed using the test result analysis tool 232 and the like, whereby it can be checked whether the second integrated circuit 210 operates correctly.
Thus, as for the board 226 employing the integrated circuits 210 in which the boundary scan element is incorporated, the quality of each integrated circuit 210 itself and the relation in the connection between the integrated circuits 210 can be tested by implementing the boundary scan testing method.
Hereupon, the inventor of the present invention has found that when a board for a sensor module is constructed using the integrated circuits in which such boundary scan element is incorporated, the inputting/outputting of the serial data can be performed for each integrated circuit loaded on the board 226 at a speed of about 20 Mbps without using an integrated circuit for use in communication.
Then, the inventor of the present invention has proposed a communication apparatus which uses the boundary scan element to perform communication with a host computer unit and the like without using communication devices.
FIG. 8 is a block diagram showing an example of the communication apparatus in which the boundary scan element is employed.
The communication apparatus 240 shown in FIG. 8 includes a communication controller unit 241 for executing transmission and collection of communication data; a plurality of sensor units 242a to 242c for executing monitoring of an object; a plurality of boundary scan elements 243a to 243c, each of which is arranged for corresponding one of the sensor units 242a to 242c, takes in control data outputted from the foregoing communication controller unit 241 to supply the control data to corresponding one of the sensor units 242a to 242c, and takes in detection data outputted from corresponding one of the sensor units 242a to 242c to supply the detection data to the foregoing communication controller unit 241; and communication lines 244 connecting the boundary scan elements 243a to 243c to the foregoing communication controller unit 241.
The boundary scan elements 243a to 243c are connected in series to the communication controller unit 241. Specifically, the output terminal 241a of the communication controller unit 241 is connected to the TDI terminal of the boundary scan element 243a, the TDO terminal of the boundary scan element 243a is connected to the TDI terminal of the subsequent boundary scan element 243b, and the TDO terminal of the boundary scan element 243c is connected to the input terminal 241b of the communication controller unit 241.
The function of the communication apparatus 240 is as follows.
Each of the boundary scan elements 243a to 243c functions in synchronization with clock signals transmitted from the TCK terminal 241d of the communication controller unit 241, and an operation mode of each TAP controller is switched by a TMS signal transmitted from the TMS terminal 241c of the communication controller unit 241.
Then, in the case where each of the sensor units 242a to 242c is driven based on an instruction from the host computer unit 245, control data (serial data) is outputted from the output terminal 241a of the communication controller unit 241 so as to be supplied to each of the boundary scan elements 243a to 243c, thus setting the control data in the boundary cells corresponding to the output terminal. Subsequently, the control data set in each of the boundary cells is outputted, and then supplied to each of the sensor units 242a to 242c provided for corresponding one of the boundary scan elements 243a to 243c, so that the sensor units 242a to 242c are driven.
Furthermore, in the case where the detection data is collected from each of the sensor units 242a to 242c based on the instruction from the host computer unit 245, the detection data and the like from the sensor units 242a to 242c are once set in the boundary cells corresponding to the input terminals of the boundary scan elements 243a to 243c, respectively. Then, these data are respectively outputted from the TDO terminals as serial data, and these data are taken in by the input terminal 241b of the communication controller unit 241.
In such communication apparatus 240, in the case where the control data is set in each of the boundary scan elements 243a to 243c or in the case where the detection data and the like are outputted from each of the boundary scan elements 243a to 243c, the data transfer speed can be set to up to 20 Mbps, thus enabling the communication data to be transferred at a higher speed compared to conventional communication apparatus.
However, with the conventional boundary scan element, in the case where the boundary scan testing method is carried out for circuits in which two integrated circuits are connected in parallel to one integrated circuit, individual tests cannot be carried out in parallel for the two integrated circuits, so that it has been sometimes impossible to perform a series of processings smoothly.
Moreover, in the conventional boundary scan element, since all the boundary cells are connected in series to each other, even when it is intended to transfer the data to the output terminal side boundary cell, data must be shifted via the input terminal side boundary cell. Accordingly, the transfer speed can be slow.
The object of the present invention is to provide a boundary scan element which enables acceleration of the foregoing processings, and a communication apparatus using the same.
According to the present invention, there is provided a boundary scan element comprising a plurality of input terminal side boundary cells which are connected in series, each being individually allocated to corresponding one of input terminals; a plurality of output terminal side boundary cells which are connected in series, each being individually allocated to corresponding one of output terminals; a TAP circuit for controlling input/output of data to/from the boundary cells on the input/output terminal sides; a TDI terminal for receiving serial data to be supplied to said boundary cells; a TDO terminal for outputting the data from said boundary cells as serial data; a TCK terminal for receiving clock signals; and a TMS terminal for receiving a mode signal to switch an operation mode of said TAP circuit,
wherein said boundary cells on the input/output terminal sides are connected in parallel between said TDI and TDO terminals, respectively, and
wherein two sets of combinations composed of said input terminal side boundary cells, said output terminal side boundary cells, the foregoing TDI terminal, said TDO terminal and said TAP circuit are provided.
Since in the boundary scan element of the present invention, the two sets of combinations composed of the foregoing input terminal side boundary cells, the foregoing output terminal side boundary cells, the foregoing TDI terminal, the foregoing TDO terminal and the foregoing TAP circuit are provided, test data and the like can be input/output for each combination. Therefore, even when the boundary scan testing method is carried out for the circuit in which two integrated circuits are connected in parallel to one integrated circuit, it is possible to execute individual tests for the two integrated circuits simultaneously, so that a series of processings can be performed smoothly.
Furthermore, in the boundary scan element of the present invention, all the boundary cells are not connected in series to each other like the conventional boundary scan element, and the input terminal side boundary cells and the output terminal side boundary cells are connected in parallel between the TDI terminal and the TDO terminal.
Accordingly, it will be possible to directly input/output the data to/from the boundary cells on the input/output terminal sides, resulting in an increase in a data transfer speed.
Moreover, according to the present invention, there is provided a communication apparatus comprising a plurality of boundary scan elements which comprises a plurality of input terminal side boundary cells connected in series, each being individually allocated to corresponding one of input terminals, a plurality of output terminal side boundary cells connected in series, each being individually allocated to corresponding one of output terminals, a TAP circuit for controlling input/output of data to/from the boundary cells on the input/output terminal sides, a TDI terminal for receiving serial data to be supplied to said boundary cells, a TDO terminal for outputting the data from said boundary cells as serial data, a TCK terminal for receiving clock signals, and a TMS terminal for receiving a mode signal to switch an operation mode of said TAP circuit, wherein said input terminal side boundary cells and said output terminal side boundary cells are connected in parallel between said TDI terminal and said TDO terminal, respectively; a plurality of terminal equipments, each having either an IC connected to corresponding one of said boundary scan elements or an IC in which corresponding one of said boundary scan elements is incorporated; and a communication controller for transmitting/receiving communication data via said boundary scan elements, the communication data individually controlling said terminal equipment; wherein said boundary scan element comprises two sets of combinations composed of the input terminal side boundary cells, the output terminal side boundary cells, the TDI terminal, the TDO terminal and the TAP circuit, and wherein the communication controller comprises two terminal portions composed of a communication data output terminal for transmitting the communication data to the boundary scan element and a communication data input terminal for receiving the communication data from the boundary scan element, one of the combinations of the boundary scan element being connected in series to either of the terminal portions and the other of the combinations of the boundary scan element being connected in series to the other terminal portion so that the transfer directions of the communication data are inverse to each other.
The present invention relates to a communication apparatus using the boundary scan element described above, in particular, the apparatus which is capable of coping with disconnections of communication lines connecting the components.
In the present invention, the foregoing boundary scan elements, each of which comprises the two sets of combinations capable of individually performing a communication processing for the foregoing terminal equipment, are connected, and the foregoing combinations are connected independently to the foregoing communication controller so that the transfer directions of the communication data are inverse to each other.
Accordingly, the communication processing is normally performed using only one of the foregoing combinations, and when disconnection occurs in a part of the communication lines, the communication processing is performed using the other combination, whereby it is possible to input/output the communication data to/from all of the foregoing terminal equipment.
In the communication apparatus of the present invention, the foregoing terminal equipment may be various kinds of sensor units, for example, monitoring camera equipment and the like. In connecting the terminal equipment with the foregoing boundary scan element, the output terminal is connected to an input terminal of the terminal equipment, and the input terminal is connected to an output terminal of the terminal equipment, whereby data of the foregoing boundary cell is outputted to the terminal equipment and, contrary to this, data is inputted to the boundary cell.
The foregoing communication data also includes data detected by and transmitted from the terminal equipment and state data indicating whether or not the terminal equipment operates normally, in addition to the control data transmitted to the terminal equipment in order to control the terminal equipment.